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A Silicon-on-insulator Vertical Nanogap Device For Electrical Transport Measurements In Aqueous Electrolyte Solution
Published 2007 · Materials Science
A novel concept for metal electrodes with few 10 nm separation for electrical conductance measurements in an aqueous electrolyte environment is presented. Silicon-on-insulator (SOI) material with 10 nm buried silicon dioxide serves as a base substrate for the formation of SOI plateau structures which, after recess-etching the thin oxide layer, thermal oxidation and subsequent metal thin film evaporation, feature vertically oriented nanogap electrodes at their exposed sidewalls. During fabrication only standard silicon process technology without any high-resolution nanolithographic techniques is employed. The vertical concept allows an array-like parallel processing of many individual devices on the same substrate chip. As analysed by cross-sectional TEM analysis the devices exhibit a well-defined material layer architecture, determined by the chosen material thicknesses and process parameters. To investigate the device in aqueous solution, we passivated the sample surface by a polymer layer, leaving a micrometre-size fluid access window to the nanogap region only. First current–voltage characteristics of a 65 nm gap device measured in 60 mM buffer solution reveal excellent electrical isolation behaviour which suggests applications in the field of biomolecular electronics in a natural environment.